In the field of radio frequency (RF) receivers, an antenna signal may be amplified before it is fed into a detector element. The gain of the small antenna signal to the detector can be as much as 80 dB, or more. Direct current (DC) offset, caused by for example production tolerances of the elements of the receiver chain, if amplified by the same amount, could easily saturate the detector. Usually, this is avoided by amplifying the desired signal when its frequency is well above 0 Hz, while adding one or more DC blocking devices in the receive chain. A DC blocking device can be as simple as a first order high-pass filter (HPF).
Section 4.2.3 of “RF Microelectronics”, by Behzad Razavi, second edition, Pearson Education, 2012, discloses a receiver architecture that uses a low intermediate frequency (LIF). This architecture allows a channel select filter to be integrated on-chip, while it still allows DC blocking to be achieved by one or more HPFs. Typically LIF receivers comprise a DC blocking devices deployed at a suitable location of an amplifier.
Herein above, aspects of receivers have been discussed. However, also other signal processing applications in which a large amount of gain is applied to a signal may benefit from some sort of DC offset compensation.